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| Philips Semiconductors FAST Products Preliminary specification 16 x 4 Synchronous FIFO (3-State) 74F224 FEATURES outputs * Independent synchronous inputs and * Organized as 16 words of 4 bits * DC to 50MHz data rate * 3-State outputs * Cascadable in word-width and depth direction TYPICAL SUPPLY CURRENT (TOTAL) 90mA DESCRIPTION This 64-bit active element First-In-First-Out (FIFO) is a monolithic Schottky-clamped transistor-transistor logic (STLL) array organized as 16 words of 4-bits each. A memory system using the 74F224 can be easily expanded in multiples of 15m+1 words or of 4n bits, or both (where n is the number of packages in the horizontal array). However, an external gating is required (see Figure 1). For longer words using 74F224, the IR signals of the first-rank packages and OR signals of the last-rank packages must be ANDed for proper synchronization.The 3-State outputs controlled by a single input (OE) make bus connection and multiplexing easy. TYPE TYPICAL fmax 50MHz 74F224 ORDERING INFORMATION ORDER CODE DESCRIPTION COMMERCIAL RANGE VCC = 5V 10%, Tamb = 0C to +70C 16-pin plastic Dual In-line Package 16-pin plastic Small Outline Large N74F224N N74F224D 0406C 0171B DRAWING NUMBER INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS LDCP D0 - D3 OE UNCP MR IR Q0 - Q3 Load clock input Data inputs Output enable input (active high) Unload clock input Master reset input (active low) Input ready output Data outputs DESCRIPTION 74F (U.L.) HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 50/33 50/33 50/33 LOAD VALUE HIGH/LOW 20A/0.6mA 20A/0.6mA 20A/0.6mA 20A/0.6mA 20A/0.6mA 1.0mA/20mA 1.0mA/20mA 1.0mA/20mA OR Output ready output NOTE TO INPUT AND OUTPUT LOADING AND FAN OUT TABLE 1. One (1.0) FAST unit load is defined as: 20A in the high state and 0.6mA in the low state. PIN CONFIGURATION LOGIC SYMBOL 4 5 67 IED/IEEE SYMBOL FIFO 16 X 4 1 9 EN5 CT=0 CT<0 CTR & +/C1 Z2 CT>0 15 4 1D 5 & - CT=0 2 & V4 4,5 13 12 13 10 2 3 2 14 OE 1 IR 2 16 15 14 13 12 11 10 9 VCC UNCP OR Q0 Q1 Q2 Q3 13 12 11 10 2 14 MR VCC = Pin 16 GND = Pin 8 1 13 3 9 OE UNCP LDCP MR Q0 Q1 Q2 Q3 IR OR D0 D1 D2 D3 LDCP 3 D0 D1 D2 D3 GND 4 5 6 7 8 3 Z3 6 7 September 7, 1990 1 This datasheet has been download from: www..com Datasheets for electronics components. |
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